K. Batcher. Proceedings of the April 30--May 2, 1968, Spring Joint Computer Conference, page 307--314. New York, NY, USA, ACM, (1968)
DOI: 10.1145/1468075.1468121
Abstract
To achieve high throughput rates today's computers perform several operations simultaneously. Not only are I/O operations performed concurrently with computing, but also, in multiprocessors, several computing operations are done concurrently. A major problem in the design of such a computing system is the connecting together of the various parts of the system (the I/O devices, memories, processing units, etc.) in such a way that all the required data transfers can be accommodated. One common scheme is a high-speed bus which is time-shared by the various parts; speed of available hardware limits this scheme. Another scheme is a cross-bar switch or matrix; limiting factors here are the amount of hardware (an m × n matrix requires m × n cross-points) and the fan-in and fan-out of the hardware.
%0 Conference Paper
%1 Batcher:1968:SNA:1468075.1468121
%A Batcher, K. E.
%B Proceedings of the April 30--May 2, 1968, Spring Joint Computer Conference
%C New York, NY, USA
%D 1968
%I ACM
%K algorithm parallel sorting sorting.network
%P 307--314
%R 10.1145/1468075.1468121
%T Sorting Networks and Their Applications
%U http://doi.acm.org/10.1145/1468075.1468121
%X To achieve high throughput rates today's computers perform several operations simultaneously. Not only are I/O operations performed concurrently with computing, but also, in multiprocessors, several computing operations are done concurrently. A major problem in the design of such a computing system is the connecting together of the various parts of the system (the I/O devices, memories, processing units, etc.) in such a way that all the required data transfers can be accommodated. One common scheme is a high-speed bus which is time-shared by the various parts; speed of available hardware limits this scheme. Another scheme is a cross-bar switch or matrix; limiting factors here are the amount of hardware (an m × n matrix requires m × n cross-points) and the fan-in and fan-out of the hardware.
@inproceedings{Batcher:1968:SNA:1468075.1468121,
abstract = {To achieve high throughput rates today's computers perform several operations simultaneously. Not only are I/O operations performed concurrently with computing, but also, in multiprocessors, several computing operations are done concurrently. A major problem in the design of such a computing system is the connecting together of the various parts of the system (the I/O devices, memories, processing units, etc.) in such a way that all the required data transfers can be accommodated. One common scheme is a high-speed bus which is time-shared by the various parts; speed of available hardware limits this scheme. Another scheme is a cross-bar switch or matrix; limiting factors here are the amount of hardware (an m × n matrix requires m × n cross-points) and the fan-in and fan-out of the hardware.},
acmid = {1468121},
added-at = {2016-10-29T12:56:23.000+0200},
address = {New York, NY, USA},
author = {Batcher, K. E.},
biburl = {https://www.bibsonomy.org/bibtex/2065f1bbe90d496cc3729a4046abe58fd/ytyoun},
booktitle = {Proceedings of the April 30--May 2, 1968, Spring Joint Computer Conference},
doi = {10.1145/1468075.1468121},
interhash = {82b5b504a8964726e511c50bb401d11b},
intrahash = {065f1bbe90d496cc3729a4046abe58fd},
keywords = {algorithm parallel sorting sorting.network},
location = {Atlantic City, New Jersey},
numpages = {8},
pages = {307--314},
publisher = {ACM},
series = {AFIPS '68 (Spring)},
timestamp = {2016-11-05T13:11:09.000+0100},
title = {Sorting Networks and Their Applications},
url = {http://doi.acm.org/10.1145/1468075.1468121},
year = 1968
}