%0 Conference Paper %1 conf/vlsid/PomeranzR04 %A Pomeranz, Irith %A Reddy, Sudhakar M. %B VLSI Design %D 2004 %I IEEE Computer Society %K dblp %P 741-744 %T On Interconnecting Circuits with Multiple Scan Chains for Improved Test Data Compression. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2004.html#PomeranzR04 %@ 0-7695-2072-3

@inproceedings{conf/vlsid/PomeranzR04, added-at = {2023-03-24T00:00:00.000+0100}, author = {Pomeranz, Irith and Reddy, Sudhakar M.}, biburl = {https://www.bibsonomy.org/bibtex/2958617d0aea5de8f854fb8dbda862026/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2004}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2004.1261016}, interhash = {4c33c816838fa961d651548c50e82a2c}, intrahash = {958617d0aea5de8f854fb8dbda862026}, isbn = {0-7695-2072-3}, keywords = {dblp}, pages = {741-744}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:18:22.000+0200}, title = {On Interconnecting Circuits with Multiple Scan Chains for Improved Test Data Compression.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2004.html#PomeranzR04}, year = 2004 }