Abstract
This paper reports a novel architecture for multi-channel sine and square wave synthesizer. A phase accumulator is the core of multi-channel synthesizer. The phase accumulator’s output is multiplexed on the output channels and held by each channel latch. It is considered the MSB of the phase accumulator as the square wave synthesizer output. According to the proposed architecture, a 4-channel square wave synthesizer is designed, simulated and implemented. Spartan-Xc3s400 from Xilinx-FPGA family is used to physically implementation. The system consumes 161 mW@40 MHz. The frequency resolution of the square wave synthesizer is 0.3 Hz in a range of 0-5 MHz. Finally, a novel architecture is proposed to produce sine from square wave and using designed 4-channel square wave synthesizer a 2-channel sine wave synthesizer is designed and simulate.
Users
Please
log in to take part in the discussion (add own reviews or comments).