%0 Conference Paper %1 conf/dac/BaoVSMRPCYSFKM19 %A Bao, Trong Huynh %A Veloso, Anabela %A Sakhare, Sushil %A Matagne, Philippe %A Ryckaert, Julien %A Perumkunnil, Manu %A Crotti, Davide %A Yasin, Farrukh %A Spessot, Alessio %A Furnémont, Arnaud %A Kar, Gouri Sankar %A Mocuta, Anda %B DAC %D 2019 %I ACM %K dblp %P 13 %T Process, Circuit and System Co-optimization of Wafer Level Co-Integrated FinFET with Vertical Nanosheet Selector for STT-MRAM Applications. %U http://dblp.uni-trier.de/db/conf/dac/dac2019.html#BaoVSMRPCYSFKM19 %@ 978-1-4503-6725-7

@inproceedings{conf/dac/BaoVSMRPCYSFKM19, added-at = {2021-08-08T00:00:00.000+0200}, author = {Bao, Trong Huynh and Veloso, Anabela and Sakhare, Sushil and Matagne, Philippe and Ryckaert, Julien and Perumkunnil, Manu and Crotti, Davide and Yasin, Farrukh and Spessot, Alessio and Furnémont, Arnaud and Kar, Gouri Sankar and Mocuta, Anda}, biburl = {https://www.bibsonomy.org/bibtex/293a6cec606b9e9f4a15a7c18e874a99f/dblp}, booktitle = {DAC}, crossref = {conf/dac/2019}, ee = {https://ieeexplore.ieee.org/document/8807022}, interhash = {bd8f96bf2554741e9472d71982c46f4b}, intrahash = {93a6cec606b9e9f4a15a7c18e874a99f}, isbn = {978-1-4503-6725-7}, keywords = {dblp}, pages = 13, publisher = {ACM}, timestamp = {2024-04-10T06:54:31.000+0200}, title = {Process, Circuit and System Co-optimization of Wafer Level Co-Integrated FinFET with Vertical Nanosheet Selector for STT-MRAM Applications.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2019.html#BaoVSMRPCYSFKM19}, year = 2019 }