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%0 Conference Paper
%1 conf/esscirc/CosemansDC08
%A Cosemans, Stefan
%A Dehaene, Wim
%A Catthoor, Francky
%B ESSCIRC
%D 2008
%E Redman-White, William
%E Walton, Anthony J.
%I IEEE
%K dblp
%P 278-281
%T A 3.6pJ/access 480MHz, 128Kbit on-Chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variability.
%U http://dblp.uni-trier.de/db/conf/esscirc/esscirc2008.html#CosemansDC08
%@ 978-1-4244-2361-3
@inproceedings{conf/esscirc/CosemansDC08,
added-at = {2020-09-25T00:00:00.000+0200},
author = {Cosemans, Stefan and Dehaene, Wim and Catthoor, Francky},
biburl = {https://www.bibsonomy.org/bibtex/200afef6dad8b3292d4b34eecda2a4039/dblp},
booktitle = {ESSCIRC},
crossref = {conf/esscirc/2008},
editor = {Redman-White, William and Walton, Anthony J.},
ee = {https://doi.org/10.1109/ESSCIRC.2008.4681846},
interhash = {0239a158ec235f8b1191cd97528bd872},
intrahash = {00afef6dad8b3292d4b34eecda2a4039},
isbn = {978-1-4244-2361-3},
keywords = {dblp},
pages = {278-281},
publisher = {IEEE},
timestamp = {2024-04-09T17:25:05.000+0200},
title = {A 3.6pJ/access 480MHz, 128Kbit on-Chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variability.},
url = {http://dblp.uni-trier.de/db/conf/esscirc/esscirc2008.html#CosemansDC08},
year = 2008
}