%0 Conference Paper %1 conf/asicon/ZhangJC15 %A Zhang, Feng %A Ju, Hao %A Chen, Chengying %B ASICON %D 2015 %I IEEE %K dblp %P 1-4 %T A PVT variation tolerant and low power 5Gb/s clock and data recovery circuit for PCI-E 2.0/USB 3.0. %U http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#ZhangJC15 %@ 978-1-4799-8485-5

@inproceedings{conf/asicon/ZhangJC15, added-at = {2018-10-25T00:00:00.000+0200}, author = {Zhang, Feng and Ju, Hao and Chen, Chengying}, biburl = {https://www.bibsonomy.org/bibtex/24e4fa6531a18c53abf6afad46b614a29/dblp}, booktitle = {ASICON}, crossref = {conf/asicon/2015}, ee = {https://doi.org/10.1109/ASICON.2015.7517057}, interhash = {073cb700df7c10dc59c0304f9f20e298}, intrahash = {4e4fa6531a18c53abf6afad46b614a29}, isbn = {978-1-4799-8485-5}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2018-10-26T11:39:48.000+0200}, title = {A PVT variation tolerant and low power 5Gb/s clock and data recovery circuit for PCI-E 2.0/USB 3.0.}, url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2015.html#ZhangJC15}, year = 2015 }