%0 Journal Article %1 journals/jssc/YiZZGCLY22 %A Yi, Yongran %A Zhao, Dixian %A Zhang, Jiajun %A Gu, Peng %A Chai, Yuan %A Liu, Huiqi %A You, Xiaohu %D 2022 %J IEEE J. Solid State Circuits %K dblp %N 9 %P 2702-2718 %T A 24-29.5-GHz Highly Linear Phased-Array Transceiver Front-End in 65-nm CMOS Supporting 800-MHz 64-QAM and 400-MHz 256-QAM for 5G New Radio. %U http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#YiZZGCLY22 %V 57

@article{journals/jssc/YiZZGCLY22, added-at = {2023-06-30T00:00:00.000+0200}, author = {Yi, Yongran and Zhao, Dixian and Zhang, Jiajun and Gu, Peng and Chai, Yuan and Liu, Huiqi and You, Xiaohu}, biburl = {https://www.bibsonomy.org/bibtex/28479352de1ca262c2312e35a09a0a3d0/dblp}, ee = {https://doi.org/10.1109/JSSC.2022.3169588}, interhash = {0a3bb577aee4cc1a28edfbf9a196f586}, intrahash = {8479352de1ca262c2312e35a09a0a3d0}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 9, pages = {2702-2718}, timestamp = {2024-04-08T10:42:32.000+0200}, title = {A 24-29.5-GHz Highly Linear Phased-Array Transceiver Front-End in 65-nm CMOS Supporting 800-MHz 64-QAM and 400-MHz 256-QAM for 5G New Radio.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc57.html#YiZZGCLY22}, volume = 57, year = 2022 }