%0 Conference Paper %1 conf/nanoarch/RakhejaK17 %A Rakheja, Shaloo %A Kani, N. %B NANOARCH %D 2017 %I IEEE %K dblp %P 131-132 %T Polymorphic spintronic logic gates for hardware security primitives - Device design and performance benchmarking. %U http://dblp.uni-trier.de/db/conf/nanoarch/nanoarch2017.html#RakhejaK17 %@ 978-1-5090-6037-5

@inproceedings{conf/nanoarch/RakhejaK17, added-at = {2023-03-23T00:00:00.000+0100}, author = {Rakheja, Shaloo and Kani, N.}, biburl = {https://www.bibsonomy.org/bibtex/26c2967e47e5cf1555b5ab28455244021/dblp}, booktitle = {NANOARCH}, crossref = {conf/nanoarch/2017}, ee = {https://doi.ieeecomputersociety.org/10.1109/NANOARCH.2017.8053726}, interhash = {2050fefd6bc6118d5607e543910c8af1}, intrahash = {6c2967e47e5cf1555b5ab28455244021}, isbn = {978-1-5090-6037-5}, keywords = {dblp}, pages = {131-132}, publisher = {IEEE}, timestamp = {2024-04-10T18:03:57.000+0200}, title = {Polymorphic spintronic logic gates for hardware security primitives - Device design and performance benchmarking.}, url = {http://dblp.uni-trier.de/db/conf/nanoarch/nanoarch2017.html#RakhejaK17}, year = 2017 }