%0 Conference Paper %1 conf/eurodac/HirechFGR94 %A Hirech, Mokhtar %A Florent, Olivier %A Greiner, Alain %A Rejouan, El Housseine %B EDAC-ETC-EUROASIC %D 1994 %E Werner, Robert %I IEEE Computer Society %K dblp %P 668 %T A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking. %U http://dblp.uni-trier.de/db/conf/eurodac/eurodac1994.html#HirechFGR94 %@ 0-8186-5410-4

@inproceedings{conf/eurodac/HirechFGR94, added-at = {2017-05-24T00:00:00.000+0200}, author = {Hirech, Mokhtar and Florent, Olivier and Greiner, Alain and Rejouan, El Housseine}, biburl = {https://www.bibsonomy.org/bibtex/2a0d9beb6d1f15a826089760a2ba041c8/dblp}, booktitle = {EDAC-ETC-EUROASIC}, crossref = {conf/eurodac/1994edac}, editor = {Werner, Robert}, ee = {https://doi.org/10.1109/EDTC.1994.326796}, interhash = {24ed883425117fba1ebfcfc741c1b786}, intrahash = {a0d9beb6d1f15a826089760a2ba041c8}, isbn = {0-8186-5410-4}, keywords = {dblp}, pages = 668, publisher = {IEEE Computer Society}, timestamp = {2019-10-17T22:26:24.000+0200}, title = {A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking.}, url = {http://dblp.uni-trier.de/db/conf/eurodac/eurodac1994.html#HirechFGR94}, year = 1994 }