%0 Conference Paper %1 conf/vlsid/Kataria01 %A Kataria, Deepak %B VLSI Design %D 2001 %I IEEE Computer Society %K dblp %P 13-15 %T Next Generation Network Processors. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2001.html#Kataria01 %@ 0-7695-0831-6

@inproceedings{conf/vlsid/Kataria01, added-at = {2023-03-24T00:00:00.000+0100}, author = {Kataria, Deepak}, biburl = {https://www.bibsonomy.org/bibtex/24c4d4e74709d7c78cb6596e0cb4a8f07/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2001}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2001.10015}, interhash = {3c503d3d78b5bd923659b6b30c191052}, intrahash = {4c4d4e74709d7c78cb6596e0cb4a8f07}, isbn = {0-7695-0831-6}, keywords = {dblp}, pages = {13-15}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:08.000+0200}, title = {Next Generation Network Processors.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2001.html#Kataria01}, year = 2001 }