%0 Conference Paper %1 conf/glvlsi/HuSSZ16 %A Hu, Qingda %A Sun, Guangyu %A Shu, Jiwu %A Zhang, Chao %B ACM Great Lakes Symposium on VLSI %D 2016 %E Coskun, Ayse K. %E Margala, Martin %E Behjat, Laleh %E Han, Jie %I ACM %K dblp %P 397-402 %T Exploring Main Memory Design Based on Racetrack Memory Technology. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2016.html#HuSSZ16 %@ 978-1-4503-4274-2

@inproceedings{conf/glvlsi/HuSSZ16, added-at = {2019-05-18T00:00:00.000+0200}, author = {Hu, Qingda and Sun, Guangyu and Shu, Jiwu and Zhang, Chao}, biburl = {https://www.bibsonomy.org/bibtex/2e14ffbf29cea2589f56b740f821738eb/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2016}, editor = {Coskun, Ayse K. and Margala, Martin and Behjat, Laleh and Han, Jie}, ee = {https://doi.org/10.1145/2902961.2902967}, interhash = {4559257181b3b2f6f50435d97793b12d}, intrahash = {e14ffbf29cea2589f56b740f821738eb}, isbn = {978-1-4503-4274-2}, keywords = {dblp}, pages = {397-402}, publisher = {ACM}, timestamp = {2024-04-09T22:51:45.000+0200}, title = {Exploring Main Memory Design Based on Racetrack Memory Technology.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2016.html#HuSSZ16}, year = 2016 }