%0 Journal Article %1 journals/tcad/ZhengMM03 %A Zheng, Hao %A Mercer, Eric %A Myers, Chris J. %D 2003 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 9 %P 1138-1153 %T Modular verification of timed circuits using automatic abstraction. %U http://dblp.uni-trier.de/db/journals/tcad/tcad22.html#ZhengMM03 %V 22

@article{journals/tcad/ZhengMM03, added-at = {2020-09-24T00:00:00.000+0200}, author = {Zheng, Hao and Mercer, Eric and Myers, Chris J.}, biburl = {https://www.bibsonomy.org/bibtex/2d3c2156a941ea6a209721d1b6a7b3a46/dblp}, ee = {https://www.wikidata.org/entity/Q59859591}, interhash = {4a2c56967f8d82e37a20dd5ef0fa7deb}, intrahash = {d3c2156a941ea6a209721d1b6a7b3a46}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 9, pages = {1138-1153}, timestamp = {2020-09-25T11:46:56.000+0200}, title = {Modular verification of timed circuits using automatic abstraction.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad22.html#ZhengMM03}, volume = 22, year = 2003 }