%0 Journal Article %1 journals/tcad/KavousianosCJP12 %A Kavousianos, Xrysovalantis %A Chakrabarty, Krishnendu %A Jain, Arvind %A Parekhji, Rubin A. %D 2012 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 11 %P 1754-1766 %T Test Schedule Optimization for Multicore SoCs: Handling Dynamic Voltage Scaling and Multiple Voltage Islands. %U http://dblp.uni-trier.de/db/journals/tcad/tcad31.html#KavousianosCJP12 %V 31

@article{journals/tcad/KavousianosCJP12, added-at = {2022-01-03T00:00:00.000+0100}, author = {Kavousianos, Xrysovalantis and Chakrabarty, Krishnendu and Jain, Arvind and Parekhji, Rubin A.}, biburl = {https://www.bibsonomy.org/bibtex/2f5df0045bb9b2ac8791f1018c8c6a7a6/dblp}, ee = {https://doi.org/10.1109/TCAD.2012.2203600}, interhash = {4b9dc499e4af4f5e1cc64cfe2bcccad5}, intrahash = {f5df0045bb9b2ac8791f1018c8c6a7a6}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 11, pages = {1754-1766}, timestamp = {2024-04-08T19:46:10.000+0200}, title = {Test Schedule Optimization for Multicore SoCs: Handling Dynamic Voltage Scaling and Multiple Voltage Islands.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad31.html#KavousianosCJP12}, volume = 31, year = 2012 }