%0 Journal Article %1 journals/tcasII/KimOKLK23 %A Kim, Jongho %A Oh, Young H. %A Kim, Hyeonsik %A Lee, Jae W. %A Kim, Jintae %D 2023 %J IEEE Trans. Circuits Syst. II Express Briefs %K dblp %N 9 %P 3228-3232 %T A 4-bit 4.5-ns-Latency Pseudo-ReRAM Computing-In-Memory Macro With Self Error-Correcting DTC-Based WL Drivers and 6-bit CDAC-Less Column ADCs Having Ultra-Narrow Pitch. %U http://dblp.uni-trier.de/db/journals/tcasII/tcasII70.html#KimOKLK23 %V 70

@article{journals/tcasII/KimOKLK23, added-at = {2023-09-14T00:00:00.000+0200}, author = {Kim, Jongho and Oh, Young H. and Kim, Hyeonsik and Lee, Jae W. and Kim, Jintae}, biburl = {https://www.bibsonomy.org/bibtex/23c668eb8915cfdbf17747d3a3f23fdf5/dblp}, ee = {https://doi.org/10.1109/TCSII.2023.3273290}, interhash = {6c405362665535004dcec5a3334a9bd6}, intrahash = {3c668eb8915cfdbf17747d3a3f23fdf5}, journal = {IEEE Trans. Circuits Syst. II Express Briefs}, keywords = {dblp}, month = {September}, number = 9, pages = {3228-3232}, timestamp = {2024-04-08T16:52:46.000+0200}, title = {A 4-bit 4.5-ns-Latency Pseudo-ReRAM Computing-In-Memory Macro With Self Error-Correcting DTC-Based WL Drivers and 6-bit CDAC-Less Column ADCs Having Ultra-Narrow Pitch.}, url = {http://dblp.uni-trier.de/db/journals/tcasII/tcasII70.html#KimOKLK23}, volume = 70, year = 2023 }