Inproceedings,
Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip.
M. Shelburne, C. Patterson, P. Athanas, M. Jones, B. Martin, and R. Fong.FPL, page 257-262. IEEE, (2008)
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- BibTeX key
- conf/fpl/ShelburnePAJMF08
- entry type
- inproceedings
- booktitle
- FPL
- year
- 2008
- pages
- 257-262
- publisher
- IEEE
- crossref
- conf/fpl/2008
- ee
- https://doi.org/10.1109/FPL.2008.4629941
- isbn
- 978-1-4244-1961-6
- url
- http://dblp.uni-trier.de/db/conf/fpl/fpl2008.html#ShelburnePAJMF08
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- please select -%0 Conference Paper
%1 conf/fpl/ShelburnePAJMF08
%A Shelburne, Matthew
%A Patterson, Cameron D.
%A Athanas, Peter
%A Jones, Mark
%A Martin, Brian S.
%A Fong, Ryan
%B FPL
%D 2008
%I IEEE
%K dblp
%P 257-262
%T Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip.
%U http://dblp.uni-trier.de/db/conf/fpl/fpl2008.html#ShelburnePAJMF08
%@ 978-1-4244-1961-6
@inproceedings{conf/fpl/ShelburnePAJMF08,
added-at = {2020-03-05T00:00:00.000+0100},
author = {Shelburne, Matthew and Patterson, Cameron D. and Athanas, Peter and Jones, Mark and Martin, Brian S. and Fong, Ryan},
biburl = {https://www.bibsonomy.org/bibtex/2f275694af6358f4fa8567e9958695d3b/dblp},
booktitle = {FPL},
crossref = {conf/fpl/2008},
ee = {https://doi.org/10.1109/FPL.2008.4629941},
interhash = {6c99cf57503cc009f4eb831939f8bbdb},
intrahash = {f275694af6358f4fa8567e9958695d3b},
isbn = {978-1-4244-1961-6},
keywords = {dblp},
pages = {257-262},
publisher = {IEEE},
timestamp = {2020-03-06T11:44:37.000+0100},
title = {Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip.},
url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2008.html#ShelburnePAJMF08},
year = 2008
}