%0 Journal Article %1 journals/tcad/MaiWDL24 %A Mai, Jing %A Wang, Jiarui %A Di, Zhixiong %A Lin, Yibo %D 2024 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 2 %P 641-653 %T Multielectrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization. %U http://dblp.uni-trier.de/db/journals/tcad/tcad43.html#MaiWDL24 %V 43

@article{journals/tcad/MaiWDL24, added-at = {2024-02-29T00:00:00.000+0100}, author = {Mai, Jing and Wang, Jiarui and Di, Zhixiong and Lin, Yibo}, biburl = {https://www.bibsonomy.org/bibtex/2a779e43ea51142c80477ddbf8bd5c222/dblp}, ee = {https://doi.org/10.1109/TCAD.2023.3313101}, interhash = {8a9b82e31b38a2e54c351c5071d626b3}, intrahash = {a779e43ea51142c80477ddbf8bd5c222}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, month = {February}, number = 2, pages = {641-653}, timestamp = {2024-04-08T19:47:24.000+0200}, title = {Multielectrostatic FPGA Placement Considering SLICEL-SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad43.html#MaiWDL24}, volume = 43, year = 2024 }