%0 Journal Article %1 journals/jcsc/BhattacharyyaKM12 %A Bhattacharyya, Kaushik %A Kumar, P. V. Ratna %A Mandal, Pradip %D 2012 %J Journal of Circuits, Systems, and Computers %K dblp %N 1 %T Improvement of Power Efficiency and output voltage Ripple of Embedded DC-DC converters with Three Step Down ratios. %U http://dblp.uni-trier.de/db/journals/jcsc/jcsc21.html#BhattacharyyaKM12 %V 21

@article{journals/jcsc/BhattacharyyaKM12, added-at = {2012-04-22T00:00:00.000+0200}, author = {Bhattacharyya, Kaushik and Kumar, P. V. Ratna and Mandal, Pradip}, biburl = {https://www.bibsonomy.org/bibtex/2de9a36d89bf411044a3fceb14b42335c/dblp}, ee = {http://dx.doi.org/10.1142/S0218126612500077}, interhash = {a9011f12558e23ea27b88180c6516bf1}, intrahash = {de9a36d89bf411044a3fceb14b42335c}, journal = {Journal of Circuits, Systems, and Computers}, keywords = {dblp}, number = 1, timestamp = {2012-04-24T11:35:30.000+0200}, title = {Improvement of Power Efficiency and output voltage Ripple of Embedded DC-DC converters with Three Step Down ratios.}, url = {http://dblp.uni-trier.de/db/journals/jcsc/jcsc21.html#BhattacharyyaKM12}, volume = 21, year = 2012 }