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%0 Journal Article
%1 journals/jssc/VanderpoolRFSCC23
%A Vanderpool, Brian T.
%A Restle, Phillip J.
%A Fluhr, Eric
%A Still, Gregory S.
%A Campisano, Francesco A.
%A Charmichael, Ian
%A Marz, Eric
%A Batra, Rahul
%A Willaman, Richard L.
%D 2023
%J IEEE J. Solid State Circuits
%K dblp
%N 1
%P 102-110
%T Deterministic Frequency and Voltage Enhancements on the POWER10 Processor.
%U http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#VanderpoolRFSCC23
%V 58
@article{journals/jssc/VanderpoolRFSCC23,
added-at = {2023-01-15T00:00:00.000+0100},
author = {Vanderpool, Brian T. and Restle, Phillip J. and Fluhr, Eric and Still, Gregory S. and Campisano, Francesco A. and Charmichael, Ian and Marz, Eric and Batra, Rahul and Willaman, Richard L.},
biburl = {https://www.bibsonomy.org/bibtex/21caa549b37bc86bda487dc1726abcc98/dblp},
ee = {https://doi.org/10.1109/JSSC.2022.3225378},
interhash = {b415993bdab4c7aaa11e1004d336dde9},
intrahash = {1caa549b37bc86bda487dc1726abcc98},
journal = {IEEE J. Solid State Circuits},
keywords = {dblp},
number = 1,
pages = {102-110},
timestamp = {2024-04-08T10:43:27.000+0200},
title = {Deterministic Frequency and Voltage Enhancements on the POWER10 Processor.},
url = {http://dblp.uni-trier.de/db/journals/jssc/jssc58.html#VanderpoolRFSCC23},
volume = 58,
year = 2023
}