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%0 Journal Article
%1 journals/tcas/CaffarenaCCCN06
%A Caffarena, Gabriel
%A Constantinides, George A.
%A Cheung, Peter Y. K.
%A Carreras, Carlos
%A Nieto-Taladriz, Octavio
%D 2006
%J IEEE Trans. Circuits Syst. II Express Briefs
%K dblp
%N 5
%P 339-343
%T Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits.
%U http://dblp.uni-trier.de/db/journals/tcas/tcasII53.html#CaffarenaCCCN06
%V 53-II
@article{journals/tcas/CaffarenaCCCN06,
added-at = {2021-10-14T00:00:00.000+0200},
author = {Caffarena, Gabriel and Constantinides, George A. and Cheung, Peter Y. K. and Carreras, Carlos and Nieto-Taladriz, Octavio},
biburl = {https://www.bibsonomy.org/bibtex/2a5be9955db0429206354bd4047f08364/dblp},
ee = {https://doi.org/10.1109/TCSII.2005.862175},
interhash = {c2131e5db7d49e1ead14b702418295a5},
intrahash = {a5be9955db0429206354bd4047f08364},
journal = {IEEE Trans. Circuits Syst. II Express Briefs},
keywords = {dblp},
number = 5,
pages = {339-343},
timestamp = {2024-04-09T06:12:48.000+0200},
title = {Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits.},
url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII53.html#CaffarenaCCCN06},
volume = {53-II},
year = 2006
}
