%0 Journal Article %1 journals/jssc/MansuriY03 %A Mansuri, Mozhgan %A Yang, Chih-Kong Ken %D 2003 %J IEEE J. Solid State Circuits %K dblp %N 11 %P 1804-1812 %T A low-power adaptive bandwidth PLL and clock buffer with supply-noise compensation. %U http://dblp.uni-trier.de/db/journals/jssc/jssc38.html#MansuriY03 %V 38

@article{journals/jssc/MansuriY03, added-at = {2022-04-20T00:00:00.000+0200}, author = {Mansuri, Mozhgan and Yang, Chih-Kong Ken}, biburl = {https://www.bibsonomy.org/bibtex/28dee081e70421ce1286caba46d7271e3/dblp}, ee = {https://doi.org/10.1109/JSSC.2003.818300}, interhash = {caccf8343d69c8353cdf4d4c28570b72}, intrahash = {8dee081e70421ce1286caba46d7271e3}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 11, pages = {1804-1812}, timestamp = {2024-04-08T10:43:19.000+0200}, title = {A low-power adaptive bandwidth PLL and clock buffer with supply-noise compensation.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc38.html#MansuriY03}, volume = 38, year = 2003 }