%0 Conference Paper %1 conf/artcom/AgarkhedPG09 %A Agarkhed, Amit %A Patil, Sharvil %A Gupta, Anu %B ARTCom %D 2009 %I IEEE Computer Society %K dblp %P 123-125 %T Improved Implementation of CRL and SCRL Gates for Ultra Low Power. %U http://dblp.uni-trier.de/db/conf/artcom/artcom2009.html#AgarkhedPG09 %@ 978-0-7695-3845-7

@inproceedings{conf/artcom/AgarkhedPG09, added-at = {2023-03-24T00:00:00.000+0100}, author = {Agarkhed, Amit and Patil, Sharvil and Gupta, Anu}, biburl = {https://www.bibsonomy.org/bibtex/280e02817882068ed2fda98c7b13146b5/dblp}, booktitle = {ARTCom}, crossref = {conf/artcom/2009}, ee = {https://doi.ieeecomputersociety.org/10.1109/ARTCom.2009.158}, interhash = {d47b6166e21fc2798da50d32a04f0367}, intrahash = {80e02817882068ed2fda98c7b13146b5}, isbn = {978-0-7695-3845-7}, keywords = {dblp}, pages = {123-125}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T03:06:55.000+0200}, title = {Improved Implementation of CRL and SCRL Gates for Ultra Low Power.}, url = {http://dblp.uni-trier.de/db/conf/artcom/artcom2009.html#AgarkhedPG09}, year = 2009 }