%0 Conference Paper %1 conf/glvlsi/JiangWM05 %A Jiang, Hailin %A Wang, Kai %A Marek-Sadowska, Malgorzata %B ACM Great Lakes Symposium on VLSI %D 2005 %E Lach, John C. %E Qu, Gang %E Ismail, Yehea I. %I ACM %K dblp %P 332-336 %T Clock skew bounds estimation under power supply and process variations. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2005.html#JiangWM05 %@ 1-59593-057-4

@inproceedings{conf/glvlsi/JiangWM05, added-at = {2018-11-06T00:00:00.000+0100}, author = {Jiang, Hailin and Wang, Kai and Marek-Sadowska, Malgorzata}, biburl = {https://www.bibsonomy.org/bibtex/217133e5a39fe0fc81f5ce261e09ed308/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2005}, editor = {Lach, John C. and Qu, Gang and Ismail, Yehea I.}, ee = {https://doi.org/10.1145/1057661.1057741}, interhash = {e3708ea48fb1da988120ae9ebff2cd1f}, intrahash = {17133e5a39fe0fc81f5ce261e09ed308}, isbn = {1-59593-057-4}, keywords = {dblp}, pages = {332-336}, publisher = {ACM}, timestamp = {2024-04-09T22:50:47.000+0200}, title = {Clock skew bounds estimation under power supply and process variations.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2005.html#JiangWM05}, year = 2005 }