%0 Journal Article %1 journals/tvlsi/SunRRJ06 %A Sun, Fei %A Ravi, Srivaths %A Raghunathan, Anand %A Jha, Niraj K. %D 2006 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 11 %P 1175-1188 %T A Scalable Synthesis Methodology for Application-Specific Processors. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi14.html#SunRRJ06 %V 14

@article{journals/tvlsi/SunRRJ06, added-at = {2021-10-14T00:00:00.000+0200}, author = {Sun, Fei and Ravi, Srivaths and Raghunathan, Anand and Jha, Niraj K.}, biburl = {https://www.bibsonomy.org/bibtex/2710adb0702ae677af9750922dc427034/dblp}, ee = {https://doi.org/10.1109/TVLSI.2006.886410}, interhash = {ebd556620c3adfa7e948e2d396ec0f25}, intrahash = {710adb0702ae677af9750922dc427034}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 11, pages = {1175-1188}, timestamp = {2024-04-08T14:32:59.000+0200}, title = {A Scalable Synthesis Methodology for Application-Specific Processors.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi14.html#SunRRJ06}, volume = 14, year = 2006 }