%0 Journal Article %1 journals/tvlsi/ShiLYO17 %A Shi, Weijing %A Li, Xin %A Yu, Zhiyi %A Overett, Gary %D 2017 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 4 %P 1362-1372 %T An FPGA-Based Hardware Accelerator for Traffic Sign Detection. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi25.html#ShiLYO17 %V 25

@article{journals/tvlsi/ShiLYO17, added-at = {2021-11-18T00:00:00.000+0100}, author = {Shi, Weijing and Li, Xin and Yu, Zhiyi and Overett, Gary}, biburl = {https://www.bibsonomy.org/bibtex/2f368eaf1ced6818e32622b0d586d4cb5/dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2016.2631428}, interhash = {ef681864ef19df7575162f5a8c2c9769}, intrahash = {f368eaf1ced6818e32622b0d586d4cb5}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 4, pages = {1362-1372}, timestamp = {2024-04-08T14:33:05.000+0200}, title = {An FPGA-Based Hardware Accelerator for Traffic Sign Detection.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi25.html#ShiLYO17}, volume = 25, year = 2017 }