%0 Journal Article %1 journals/todaes/SilvaMSS02 %A e Silva, Luís Guerra %A Marques-Silva, João %A Silveira, Luís Miguel %A Sakallah, Karem A. %D 2002 %J ACM Trans. Design Autom. Electr. Syst. %K dblp %N 1 %P 137-158 %T Satisfiability models and algorithms for circuit delay computation. %U http://dblp.uni-trier.de/db/journals/todaes/todaes7.html#SilvaMSS02 %V 7

@article{journals/todaes/SilvaMSS02, added-at = {2023-04-03T00:00:00.000+0200}, author = {e Silva, Luís Guerra and Marques-Silva, João and Silveira, Luís Miguel and Sakallah, Karem A.}, biburl = {https://www.bibsonomy.org/bibtex/2b9d289c7c919d14c6ec86d7996f875f2/dblp}, ee = {https://doi.org/10.1145/504914.504920}, interhash = {fd6b91702602e215a99d53e34323de2e}, intrahash = {b9d289c7c919d14c6ec86d7996f875f2}, journal = {ACM Trans. Design Autom. Electr. Syst.}, keywords = {dblp}, number = 1, pages = {137-158}, timestamp = {2024-04-08T21:43:00.000+0200}, title = {Satisfiability models and algorithms for circuit delay computation.}, url = {http://dblp.uni-trier.de/db/journals/todaes/todaes7.html#SilvaMSS02}, volume = 7, year = 2002 }