%0 Conference Paper %1 pirretti2004algorithms %A Pirretti, M. %A Link, G.M. %A Brooks, R.R. %A Vijaykrishnan, N. %A Kandemir, M. %A Irwin, M.J. %B VLSI, 2004. Proceedings. IEEE Computer society Annual Symposium on %D 2004 %K algorithms noc tolerant %P 46-51 %R 10.1109/ISVLSI.2004.1339507 %T Fault tolerant algorithms for network-on-chip interconnect %U http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1339507&tag=1 %X As technology scales, fault tolerance is becoming a key concern in on-chip communication. Consequently, this work examines fault tolerant communication algorithms for use in the NoC domain. Two different flooding algorithms and a random walk algorithm are investigated. We show that the flood-based fault tolerant algorithms have an exceedingly high communication overhead. We find that the redundant random walk algorithm offers significantly reduced overhead while maintaining useful levels of fault tolerance. We then compare the implementation costs of these algorithms, both in terms of area as well as in energy consumption, and show that the flooding algorithms consume an order of magnitude more energy per message transmitted.

@inproceedings{pirretti2004algorithms, abstract = {As technology scales, fault tolerance is becoming a key concern in on-chip communication. Consequently, this work examines fault tolerant communication algorithms for use in the NoC domain. Two different flooding algorithms and a random walk algorithm are investigated. We show that the flood-based fault tolerant algorithms have an exceedingly high communication overhead. We find that the redundant random walk algorithm offers significantly reduced overhead while maintaining useful levels of fault tolerance. We then compare the implementation costs of these algorithms, both in terms of area as well as in energy consumption, and show that the flooding algorithms consume an order of magnitude more energy per message transmitted.}, added-at = {2013-04-18T18:25:49.000+0200}, author = {Pirretti, M. and Link, G.M. and Brooks, R.R. and Vijaykrishnan, N. and Kandemir, M. and Irwin, M.J.}, biburl = {https://www.bibsonomy.org/bibtex/2060d5dd318ef9b0ae7c522eb5f4a319b/eberle18}, booktitle = {VLSI, 2004. Proceedings. IEEE Computer society Annual Symposium on}, description = {IEEE Xplore - Fault tolerant algorithms for network-on-chip interconnect}, doi = {10.1109/ISVLSI.2004.1339507}, interhash = {29bab358464fd495721490f16276b0de}, intrahash = {060d5dd318ef9b0ae7c522eb5f4a319b}, keywords = {algorithms noc tolerant}, pages = {46-51}, timestamp = {2013-04-18T18:25:49.000+0200}, title = {Fault tolerant algorithms for network-on-chip interconnect}, url = {http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1339507&tag=1}, year = 2004 }