%0 Conference Paper %1 Rohou:2015:BPP %A Rohou, Erven %A Swamy, Bharath Narasimha %A Seznec, André %B Proceedings of the 13th Annual IEEE/ACM International Symposium on Code Generation and Optimization %C Washington, DC, USA %D 2015 %I IEEE Computer Society %K BranchPrediction Efficiency Indirection Interpreter Performance Simulation Threading %P 103--114 %T Branch Prediction and the Performance of Interpreters: Don't Trust Folklore %U https://hal.inria.fr/hal-00911146/document %X Interpreters have been used in many contexts. They provide portability and ease of development at the expense of performance. The literature of the past decade covers analysis of why interpreters are slow, and many software techniques to improve them. A large proportion of these works focuses on the dispatch loop, and in particular on the implementation of the switch statement: typically an indirect branch instruction. Folklore attributes a significant penalty to this branch, due to its high misprediction rate. We revisit this assumption, considering state-of-the-art branch predictors and the three most recent Intel processor generations on current interpreters. Using both hardware counters on Haswell, the latest Intel processor generation, and simulation of the ITTAGE, we show that the accuracy of indirect branch prediction is no longer critical for interpreters. We further compare the characteristics of these interpreters and analyze why the indirect branch is less important than before. %@ 978-1-4799-8161-8

@inproceedings{Rohou:2015:BPP, abstract = {Interpreters have been used in many contexts. They provide portability and ease of development at the expense of performance. The literature of the past decade covers analysis of why interpreters are slow, and many software techniques to improve them. A large proportion of these works focuses on the dispatch loop, and in particular on the implementation of the switch statement: typically an indirect branch instruction. Folklore attributes a significant penalty to this branch, due to its high misprediction rate. We revisit this assumption, considering state-of-the-art branch predictors and the three most recent Intel processor generations on current interpreters. Using both hardware counters on Haswell, the latest Intel processor generation, and simulation of the ITTAGE, we show that the accuracy of indirect branch prediction is no longer critical for interpreters. We further compare the characteristics of these interpreters and analyze why the indirect branch is less important than before.}, acmid = {2738614}, added-at = {2015-08-10T10:54:22.000+0200}, address = {Washington, DC, USA}, author = {Rohou, Erven and Swamy, Bharath Narasimha and Seznec, Andr{\'e}}, biburl = {https://www.bibsonomy.org/bibtex/2806dab19051ef116526b9cfb11d65891/gron}, booktitle = {Proceedings of the 13th Annual IEEE/ACM International Symposium on Code Generation and Optimization}, description = {Branch prediction and the performance of interpreters}, interhash = {382043db2ded3bf53a5c0fff26b69c53}, intrahash = {806dab19051ef116526b9cfb11d65891}, isbn = {978-1-4799-8161-8}, keywords = {BranchPrediction Efficiency Indirection Interpreter Performance Simulation Threading}, location = {San Francisco, California}, numpages = {12}, pages = {103--114}, publisher = {IEEE Computer Society}, series = {CGO '15}, timestamp = {2015-08-10T10:54:22.000+0200}, title = {Branch Prediction and the Performance of Interpreters: Don't Trust Folklore}, url = {https://hal.inria.fr/hal-00911146/document}, year = 2015 }