%0 Conference Paper %1 conf/ats/YamadaS96 %A Yamada, Teruhiko %A Sasaki, Tsuyoshi %B Asian Test Symposium %D 1996 %I IEEE Computer Society %K dblp %P 189- %T On Current Testing of Josephson Logic Circuits Using the 4JL Gate Family. %U http://dblp.uni-trier.de/db/conf/ats/ats1996.html#YamadaS96 %@ 0-8186-7478-4

@inproceedings{conf/ats/YamadaS96, added-at = {2023-03-24T00:00:00.000+0100}, author = {Yamada, Teruhiko and Sasaki, Tsuyoshi}, biburl = {https://www.bibsonomy.org/bibtex/2ce1fa74d84df1c7c612f7b8bad50fdcd/dblp}, booktitle = {Asian Test Symposium}, crossref = {conf/ats/1996}, ee = {https://doi.ieeecomputersociety.org/10.1109/ATS.1996.555158}, interhash = {a50acc828e0e79f4e5985915963d6bcd}, intrahash = {ce1fa74d84df1c7c612f7b8bad50fdcd}, isbn = {0-8186-7478-4}, keywords = {dblp}, pages = {189-}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:35:50.000+0200}, title = {On Current Testing of Josephson Logic Circuits Using the 4JL Gate Family.}, url = {http://dblp.uni-trier.de/db/conf/ats/ats1996.html#YamadaS96}, year = 1996 }