%0 Journal Article %1 journals/jssc/VerbekeRRMYBT18 %A Verbeke, Marijn %A Rombouts, Pieter %A Ramon, Hannes %A Moeneclaey, Bart %A Yin, Xin %A Bauwelinck, Johan %A Torfs, Guy %D 2018 %J IEEE J. Solid State Circuits %K dblp %N 2 %P 470-483 %T A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit. %U http://dblp.uni-trier.de/db/journals/jssc/jssc53.html#VerbekeRRMYBT18 %V 53

@article{journals/jssc/VerbekeRRMYBT18, added-at = {2020-08-30T00:00:00.000+0200}, author = {Verbeke, Marijn and Rombouts, Pieter and Ramon, Hannes and Moeneclaey, Bart and Yin, Xin and Bauwelinck, Johan and Torfs, Guy}, biburl = {https://www.bibsonomy.org/bibtex/21f7a2a5a467f946da9f74459bf02c65a/dblp}, ee = {https://doi.org/10.1109/JSSC.2017.2755690}, interhash = {cc11796a4bebdc06add9a857117e9a3e}, intrahash = {1f7a2a5a467f946da9f74459bf02c65a}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 2, pages = {470-483}, timestamp = {2020-08-31T11:42:04.000+0200}, title = {A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc53.html#VerbekeRRMYBT18}, volume = 53, year = 2018 }