%0 Conference Paper %1 conf/vlsic/JokicACTBE21 %A Jokic, Petar %A Azarkhish, Erfan %A Cattenoz, Régis %A Türetken, Engin %A Benini, Luca %A Emery, Stéphane %B VLSI Circuits %D 2021 %I IEEE %K dblp %P 1-2 %T A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2021.html#JokicACTBE21 %@ 978-4-86348-780-2

@inproceedings{conf/vlsic/JokicACTBE21, added-at = {2024-05-07T00:00:00.000+0200}, author = {Jokic, Petar and Azarkhish, Erfan and Cattenoz, Régis and Türetken, Engin and Benini, Luca and Emery, Stéphane}, biburl = {https://www.bibsonomy.org/bibtex/29a357bd8582648aa0f05cb9b7d94e24c/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2021}, ee = {https://doi.org/10.23919/VLSICircuits52068.2021.9492401}, interhash = {756a472c44b325fb35c6ff79dc5a75f1}, intrahash = {9a357bd8582648aa0f05cb9b7d94e24c}, isbn = {978-4-86348-780-2}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-05-13T09:32:14.000+0200}, title = {A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2021.html#JokicACTBE21}, year = 2021 }