%0 Conference Paper %1 conf/nanoarch/TaskinCSV07 %A Taskin, Baris %A Chiu, Andy %A Salkind, Jonathan %A Venutolo, Daniel %B NANOARCH %D 2007 %I IEEE Computer Society %K dblp %P 54-61 %T A shift-register-based QCA memory architecture. %U http://dblp.uni-trier.de/db/conf/nanoarch/nanoarch2007.html#TaskinCSV07 %@ 978-1-4244-1791-9

@inproceedings{conf/nanoarch/TaskinCSV07, added-at = {2023-03-23T00:00:00.000+0100}, author = {Taskin, Baris and Chiu, Andy and Salkind, Jonathan and Venutolo, Daniel}, biburl = {https://www.bibsonomy.org/bibtex/24e86cf924fd4a99b4ccaef3d2388e5eb/dblp}, booktitle = {NANOARCH}, crossref = {conf/nanoarch/2007}, ee = {http://dl.acm.org/citation.cfm?id=1548935}, interhash = {0070dc42215df681e5cec9d1a4e3e4b4}, intrahash = {4e86cf924fd4a99b4ccaef3d2388e5eb}, isbn = {978-1-4244-1791-9}, keywords = {dblp}, pages = {54-61}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T18:04:30.000+0200}, title = {A shift-register-based QCA memory architecture.}, url = {http://dblp.uni-trier.de/db/conf/nanoarch/nanoarch2007.html#TaskinCSV07}, year = 2007 }