%0 Conference Paper %1 conf/iscas/ZhouLCG01 %A Zhou, Dian %A Li, Wei %A Cai, Wei %A Guo, Nailong %B ISCAS (5) %D 2001 %I IEEE %K dblp %P 383-386 %T An efficient balanced truncation realization algorithm for interconnect model order reduction. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2001-5.html#ZhouLCG01 %@ 0-7803-6685-9

@inproceedings{conf/iscas/ZhouLCG01, added-at = {2019-02-21T00:00:00.000+0100}, author = {Zhou, Dian and Li, Wei and Cai, Wei and Guo, Nailong}, biburl = {https://www.bibsonomy.org/bibtex/26bc4a0a39ebc5d071d06b9d28ca87dfb/dblp}, booktitle = {ISCAS (5)}, crossref = {conf/iscas/2001}, ee = {https://doi.org/10.1109/ISCAS.2001.922065}, interhash = {0a37bc794de6645844a4550345215757}, intrahash = {6bc4a0a39ebc5d071d06b9d28ca87dfb}, isbn = {0-7803-6685-9}, keywords = {dblp}, pages = {383-386}, publisher = {IEEE}, timestamp = {2019-02-22T11:49:38.000+0100}, title = {An efficient balanced truncation realization algorithm for interconnect model order reduction.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2001-5.html#ZhouLCG01}, year = 2001 }