%0 Conference Paper %1 conf/i2mtc/Dai0YZY20 %A Dai, Xuefeng %A Gu, Jun %A Ye, Peng %A Zhao, Yu %A Yang, Kuojun %B I2MTC %D 2020 %I IEEE %K dblp %P 1-5 %T FPGA Realization of Hardware-Flexible Parallel Structure FIR Filters Using Combined Systolic Arrays. %U http://dblp.uni-trier.de/db/conf/i2mtc/i2mtc2020.html#Dai0YZY20 %@ 978-1-7281-4460-3

@inproceedings{conf/i2mtc/Dai0YZY20, added-at = {2021-07-16T00:00:00.000+0200}, author = {Dai, Xuefeng and Gu, Jun and Ye, Peng and Zhao, Yu and Yang, Kuojun}, biburl = {https://www.bibsonomy.org/bibtex/22fd4a4d22ebc1afef0436d043c90990a/dblp}, booktitle = {I2MTC}, crossref = {conf/i2mtc/2020}, ee = {https://doi.org/10.1109/I2MTC43012.2020.9129340}, interhash = {00ef07bdc95761f762c0328b8adad8c0}, intrahash = {2fd4a4d22ebc1afef0436d043c90990a}, isbn = {978-1-7281-4460-3}, keywords = {dblp}, pages = {1-5}, publisher = {IEEE}, timestamp = {2024-04-10T13:31:34.000+0200}, title = {FPGA Realization of Hardware-Flexible Parallel Structure FIR Filters Using Combined Systolic Arrays.}, url = {http://dblp.uni-trier.de/db/conf/i2mtc/i2mtc2020.html#Dai0YZY20}, year = 2020 }