%0 Conference Paper %1 conf/asicon/LinWHFWXTX21 %A Lin, Yukai %A Wang, Yu %A Hu, Xianwu %A Feng, Jiayun %A Wen, Gan %A Xiong, Xiankui %A Tian, Haidong %A Xie, Yufeng %B ASICON %D 2021 %E Ye, Fan %E Tang, Ting-Ao %I IEEE %K dblp %P 1-4 %T A Semi-Floating Gate Transistors In-Memory Computing design with 40.14 TOPS/W for matrix-multiplication with frequently updated weight. %U http://dblp.uni-trier.de/db/conf/asicon/asicon2021.html#LinWHFWXTX21 %@ 978-1-6654-3867-4

@inproceedings{conf/asicon/LinWHFWXTX21, added-at = {2021-12-06T00:00:00.000+0100}, author = {Lin, Yukai and Wang, Yu and Hu, Xianwu and Feng, Jiayun and Wen, Gan and Xiong, Xiankui and Tian, Haidong and Xie, Yufeng}, biburl = {https://www.bibsonomy.org/bibtex/211198625b035c5d7c88811e63f195c26/dblp}, booktitle = {ASICON}, crossref = {conf/asicon/2021}, editor = {Ye, Fan and Tang, Ting-Ao}, ee = {https://doi.org/10.1109/ASICON52560.2021.9620271}, interhash = {024ce761a7a4e5d2aa328a59b032a6ae}, intrahash = {11198625b035c5d7c88811e63f195c26}, isbn = {978-1-6654-3867-4}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2024-04-09T23:07:13.000+0200}, title = {A Semi-Floating Gate Transistors In-Memory Computing design with 40.14 TOPS/W for matrix-multiplication with frequently updated weight.}, url = {http://dblp.uni-trier.de/db/conf/asicon/asicon2021.html#LinWHFWXTX21}, year = 2021 }