%0 Journal Article %1 journals/jcsc/XuBL19 %A Xu, Xingjian %A Ban, Tian %A Li, Yuehua %D 2019 %J Journal of Circuits, Systems, and Computers %K dblp %N 2 %P 1950032:1-1950032:8 %T SPLM: A Flexible and Accurate Reliability Assessment Model for Logic Circuits. %U http://dblp.uni-trier.de/db/journals/jcsc/jcsc28.html#XuBL19 %V 28

@article{journals/jcsc/XuBL19, added-at = {2019-12-19T00:00:00.000+0100}, author = {Xu, Xingjian and Ban, Tian and Li, Yuehua}, biburl = {https://www.bibsonomy.org/bibtex/299fdfabc5c01a1df42a59642b4db9bb6/dblp}, ee = {https://doi.org/10.1142/S0218126619500324}, interhash = {071025556dbb9fb30c02ef9898ea3eb4}, intrahash = {99fdfabc5c01a1df42a59642b4db9bb6}, journal = {Journal of Circuits, Systems, and Computers}, keywords = {dblp}, number = 2, pages = {1950032:1-1950032:8}, timestamp = {2019-12-20T11:42:50.000+0100}, title = {SPLM: A Flexible and Accurate Reliability Assessment Model for Logic Circuits.}, url = {http://dblp.uni-trier.de/db/journals/jcsc/jcsc28.html#XuBL19}, volume = 28, year = 2019 }