%0 Conference Paper %1 conf/ahs/ChalamalasettiPMV09 %A Chalamalasetti, Sai Rahul %A Purohit, Sohan %A Margala, Martin %A Vanderbauwhede, Wim %B AHS %D 2009 %E Suess, Martin %E Arslan, Tughrul %E Keymeulen, Didier %E Stoica, Adrian %E Erdogan, Ahmet T. %E Merodio, David %I IEEE Computer Society %K dblp %P 389-396 %T MORA - An Architecture and Programming Model for a Resource Efficient Coarse Grained Reconfigurable Processor. %U http://dblp.uni-trier.de/db/conf/ahs/ahs2009.html#ChalamalasettiPMV09 %@ 978-0-7695-3714-6

@inproceedings{conf/ahs/ChalamalasettiPMV09, added-at = {2023-03-23T00:00:00.000+0100}, author = {Chalamalasetti, Sai Rahul and Purohit, Sohan and Margala, Martin and Vanderbauwhede, Wim}, biburl = {https://www.bibsonomy.org/bibtex/296c190f67c02d19e5166dd7e9b463a92/dblp}, booktitle = {AHS}, crossref = {conf/ahs/2009}, editor = {Suess, Martin and Arslan, Tughrul and Keymeulen, Didier and Stoica, Adrian and Erdogan, Ahmet T. and Merodio, David}, ee = {https://doi.ieeecomputersociety.org/10.1109/AHS.2009.37}, interhash = {08046b5975df2e2d3c6d341a32ad41fe}, intrahash = {96c190f67c02d19e5166dd7e9b463a92}, isbn = {978-0-7695-3714-6}, keywords = {dblp}, pages = {389-396}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:00:16.000+0200}, title = {MORA - An Architecture and Programming Model for a Resource Efficient Coarse Grained Reconfigurable Processor.}, url = {http://dblp.uni-trier.de/db/conf/ahs/ahs2009.html#ChalamalasettiPMV09}, year = 2009 }