%0 Conference Paper %1 conf/intcompsymp/HungCCL14 %A Hung, Sheng-Chin %A Chen, Chieh-Yang %A Chiang, Chien-Hsueh %A Li, Yiming %B ICS %D 2014 %E Chu, William Cheng-Chung %E Chao, Han-Chieh %E Yang, Stephen Jenn-Hwa %I IOS Press %K dblp %P 157-166 %T Circuit-Simulation-Based Multi-objective Evolutionary Algorithm with Multi-Level Clock Driving Technique for a-Si: H TFTs Gate Driver Circuit Design Optimization. %U http://dblp.uni-trier.de/db/conf/intcompsymp/ics2014.html#HungCCL14 %V 274 %@ 978-1-61499-484-8

@inproceedings{conf/intcompsymp/HungCCL14, added-at = {2017-03-21T00:00:00.000+0100}, author = {Hung, Sheng-Chin and Chen, Chieh-Yang and Chiang, Chien-Hsueh and Li, Yiming}, biburl = {https://www.bibsonomy.org/bibtex/26df3982cf8954ede595625dc1a621fc7/dblp}, booktitle = {ICS}, crossref = {conf/intcompsymp/2014}, editor = {Chu, William Cheng-Chung and Chao, Han-Chieh and Yang, Stephen Jenn-Hwa}, ee = {http://dx.doi.org/10.3233/978-1-61499-484-8-157}, interhash = {08c507569a05eb76696bf4f53d98f594}, intrahash = {6df3982cf8954ede595625dc1a621fc7}, isbn = {978-1-61499-484-8}, keywords = {dblp}, pages = {157-166}, publisher = {IOS Press}, series = {Frontiers in Artificial Intelligence and Applications}, timestamp = {2017-03-22T11:35:30.000+0100}, title = {Circuit-Simulation-Based Multi-objective Evolutionary Algorithm with Multi-Level Clock Driving Technique for a-Si: H TFTs Gate Driver Circuit Design Optimization.}, url = {http://dblp.uni-trier.de/db/conf/intcompsymp/ics2014.html#HungCCL14}, volume = 274, year = 2014 }