%0 Conference Paper %1 conf/vlsic/AnVSWZWCLLLZGBD20 %A An, Hyochan %A Venkatesan, Siddharth %A Schiferl, Sam %A Wesley, Tim %A Zhang, Qirui %A Wang, Jingcheng %A Choo, Kyojin %A Liu, Shiyu %A Liu, Bowen %A Li, Ziyun %A Zhong, Hengfei %A Gong, Luyao %A Blaauw, David T. %A Dreslinski, Ronald G. %A Sylvester, Dennis %A Kim, Hun-Seok %B VLSI Circuits %D 2020 %I IEEE %K dblp %P 1-2 %T A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2020.html#AnVSWZWCLLLZGBD20 %@ 978-1-7281-9942-9

@inproceedings{conf/vlsic/AnVSWZWCLLLZGBD20, added-at = {2023-09-30T00:00:00.000+0200}, author = {An, Hyochan and Venkatesan, Siddharth and Schiferl, Sam and Wesley, Tim and Zhang, Qirui and Wang, Jingcheng and Choo, Kyojin and Liu, Shiyu and Liu, Bowen and Li, Ziyun and Zhong, Hengfei and Gong, Luyao and Blaauw, David T. and Dreslinski, Ronald G. and Sylvester, Dennis and Kim, Hun-Seok}, biburl = {https://www.bibsonomy.org/bibtex/2ea8ef131a596e8ce54181d22fed4f559/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2020}, ee = {https://doi.org/10.1109/VLSICircuits18222.2020.9162810}, interhash = {0c27d4e6bcb8852db330683c6f87991d}, intrahash = {ea8ef131a596e8ce54181d22fed4f559}, isbn = {978-1-7281-9942-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-04-10T15:34:38.000+0200}, title = {A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2020.html#AnVSWZWCLLLZGBD20}, year = 2020 }