%0 Conference Paper %1 conf/aspdac/ZhangY14 %A Zhang, Chao %A Yu, Wenjian %B ASP-DAC %D 2014 %I IEEE %K dblp %P 756-761 %T Efficient techniques for the capacitance extraction of chip-scale VLSI interconnects using floating random walk algorithm. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2014.html#ZhangY14 %@ 978-1-4799-2816-3

@inproceedings{conf/aspdac/ZhangY14, added-at = {2017-05-26T00:00:00.000+0200}, author = {Zhang, Chao and Yu, Wenjian}, biburl = {https://www.bibsonomy.org/bibtex/2c4b106cbd96d0d828d6bb11e3e691208/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2014}, ee = {https://doi.org/10.1109/ASPDAC.2014.6742981}, interhash = {0cbacf0d8e5205fa5fef480ccdc7c12a}, intrahash = {c4b106cbd96d0d828d6bb11e3e691208}, isbn = {978-1-4799-2816-3}, keywords = {dblp}, pages = {756-761}, publisher = {IEEE}, timestamp = {2019-10-17T16:44:32.000+0200}, title = {Efficient techniques for the capacitance extraction of chip-scale VLSI interconnects using floating random walk algorithm.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2014.html#ZhangY14}, year = 2014 }