%0 Conference Paper %1 conf/iscc/DengXDZDC09 %A Deng, Rangyu %A Xu, Weixia %A Dou, Qiang %A Zhou, Hongwei %A Dai, Zefu %A Chen, Haiyan %B ISCC %D 2009 %I IEEE Computer Society %K dblp %P 287-290 %T An efficient stream memory architecture for heterogeneous multicore processor. %U http://dblp.uni-trier.de/db/conf/iscc/iscc2009.html#DengXDZDC09 %@ 978-1-4244-4672-8

@inproceedings{conf/iscc/DengXDZDC09, added-at = {2023-03-24T00:00:00.000+0100}, author = {Deng, Rangyu and Xu, Weixia and Dou, Qiang and Zhou, Hongwei and Dai, Zefu and Chen, Haiyan}, biburl = {https://www.bibsonomy.org/bibtex/23152c65ec54f7144cebfe126815784f8/dblp}, booktitle = {ISCC}, crossref = {conf/iscc/2009}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISCC.2009.5202247}, interhash = {10589c17667617a8d7ce78e8f638d18c}, intrahash = {3152c65ec54f7144cebfe126815784f8}, isbn = {978-1-4244-4672-8}, keywords = {dblp}, pages = {287-290}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:24:21.000+0200}, title = {An efficient stream memory architecture for heterogeneous multicore processor.}, url = {http://dblp.uni-trier.de/db/conf/iscc/iscc2009.html#DengXDZDC09}, year = 2009 }