%0 Conference Paper %1 conf/eit/GeJC09 %A Ge, Feng %A Jain, Pranjal %A Choi, Ken %B EIT %D 2009 %I IEEE %K dblp %P 405-410 %T Ultra-low power and high speed design and implementation of AES and SHA1 hardware cores in 65 nanometer CMOS technology. %U http://dblp.uni-trier.de/db/conf/eit/eit2009.html#GeJC09 %@ 978-1-4244-3355-1

@inproceedings{conf/eit/GeJC09, added-at = {2022-06-09T00:00:00.000+0200}, author = {Ge, Feng and Jain, Pranjal and Choi, Ken}, biburl = {https://www.bibsonomy.org/bibtex/23d1276c7e496d0c05d7830cc932d1ae5/dblp}, booktitle = {EIT}, crossref = {conf/eit/2009}, ee = {https://doi.org/10.1109/EIT.2009.5189651}, interhash = {125f1e25459f44c1cdf9154fc7ca7f7a}, intrahash = {3d1276c7e496d0c05d7830cc932d1ae5}, isbn = {978-1-4244-3355-1}, keywords = {dblp}, pages = {405-410}, publisher = {IEEE}, timestamp = {2024-04-10T22:28:17.000+0200}, title = {Ultra-low power and high speed design and implementation of AES and SHA1 hardware cores in 65 nanometer CMOS technology.}, url = {http://dblp.uni-trier.de/db/conf/eit/eit2009.html#GeJC09}, year = 2009 }