%0 Conference Paper %1 conf/icaci/WangYCZ17 %A Wang, Xiaoping %A Yang, Ran %A Chen, Qiao %A Zeng, Zhigang %B ICACI %D 2017 %I IEEE %K dblp %P 7-11 %T An improved memristor-CMOS XOR logic gate and a novel full adder. %U http://dblp.uni-trier.de/db/conf/icaci/icaci2017.html#WangYCZ17 %@ 978-1-5090-4726-0

@inproceedings{conf/icaci/WangYCZ17, added-at = {2017-07-18T00:00:00.000+0200}, author = {Wang, Xiaoping and Yang, Ran and Chen, Qiao and Zeng, Zhigang}, biburl = {https://www.bibsonomy.org/bibtex/25cfb94eea415bc68e862df828251762a/dblp}, booktitle = {ICACI}, crossref = {conf/icaci/2017}, ee = {https://doi.org/10.1109/ICACI.2017.7974477}, interhash = {136494aedd5d3f31f713f45c775155a2}, intrahash = {5cfb94eea415bc68e862df828251762a}, isbn = {978-1-5090-4726-0}, keywords = {dblp}, pages = {7-11}, publisher = {IEEE}, timestamp = {2019-10-17T19:59:38.000+0200}, title = {An improved memristor-CMOS XOR logic gate and a novel full adder.}, url = {http://dblp.uni-trier.de/db/conf/icaci/icaci2017.html#WangYCZ17}, year = 2017 }