%0 Journal Article %1 journals/tcasI/WangSLBCIH21 %A Wang, Shiqing %A Sun, Zhong %A Liu, Yuheng %A Bao, Shengyu %A Cai, Yimao %A Ielmini, Daniele %A Huang, Ru %D 2021 %J IEEE Trans. Circuits Syst. I Regul. Pap. %K dblp %N 12 %P 4900-4909 %T Optimization Schemes for In-Memory Linear Regression Circuit With Memristor Arrays. %U http://dblp.uni-trier.de/db/journals/tcasI/tcasI68.html#WangSLBCIH21 %V 68

@article{journals/tcasI/WangSLBCIH21, added-at = {2024-06-04T00:00:00.000+0200}, author = {Wang, Shiqing and Sun, Zhong and Liu, Yuheng and Bao, Shengyu and Cai, Yimao and Ielmini, Daniele and Huang, Ru}, biburl = {https://www.bibsonomy.org/bibtex/23a6b6f39801bf0a4248a22dc813505e8/dblp}, ee = {https://doi.org/10.1109/TCSI.2021.3122327}, interhash = {14a950856c70ea3c7c752621bd35489b}, intrahash = {3a6b6f39801bf0a4248a22dc813505e8}, journal = {IEEE Trans. Circuits Syst. I Regul. Pap.}, keywords = {dblp}, number = 12, pages = {4900-4909}, timestamp = {2024-06-10T07:03:10.000+0200}, title = {Optimization Schemes for In-Memory Linear Regression Circuit With Memristor Arrays.}, url = {http://dblp.uni-trier.de/db/journals/tcasI/tcasI68.html#WangSLBCIH21}, volume = 68, year = 2021 }