%0 Conference Paper %1 conf/iscas/WuWSH01 %A Wu, Chien-Hsing %A Wu, Chien-Ming %A Shieh, Ming-Der %A Hwang, Yin-Tsung %B ISCAS (4) %D 2001 %I IEEE %K dblp %P 33-36 %T Systolic VLSI realization of a novel iterative division algorithm over GF(2m): a high-speed, low-complexity design. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2001-4.html#WuWSH01 %@ 0-7803-6685-9

@inproceedings{conf/iscas/WuWSH01, added-at = {2016-05-20T00:00:00.000+0200}, author = {Wu, Chien-Hsing and Wu, Chien-Ming and Shieh, Ming-Der and Hwang, Yin-Tsung}, biburl = {https://www.bibsonomy.org/bibtex/2d0ce2072dc226c46c5d153184ae50890/dblp}, booktitle = {ISCAS (4)}, crossref = {conf/iscas/2001}, ee = {http://dx.doi.org/10.1109/ISCAS.2001.922162}, interhash = {15379ec993cc9f34cb5813307cd7e409}, intrahash = {d0ce2072dc226c46c5d153184ae50890}, isbn = {0-7803-6685-9}, keywords = {dblp}, pages = {33-36}, publisher = {IEEE}, timestamp = {2016-05-21T11:49:07.000+0200}, title = {Systolic VLSI realization of a novel iterative division algorithm over GF(2m): a high-speed, low-complexity design.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2001-4.html#WuWSH01}, year = 2001 }