%0 Conference Paper %1 conf/iscas/SzilagyiBHE15 %A Szilágyi, László %A Belfiore, Guido %A Henker, Ronny %A Ellinger, Frank %B ISCAS %D 2015 %I IEEE %K dblp %P 2385-2388 %T A high-voltage DC bias architecture implementation in a 17 Gbps low-power common-cathode VCSEL driver in 80 nm CMOS. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2015.html#SzilagyiBHE15 %@ 978-1-4799-8391-9

@inproceedings{conf/iscas/SzilagyiBHE15, added-at = {2015-08-05T00:00:00.000+0200}, author = {Szilágyi, László and Belfiore, Guido and Henker, Ronny and Ellinger, Frank}, biburl = {https://www.bibsonomy.org/bibtex/27c6175956e3c90a21367f6029e36a244/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2015}, ee = {http://dx.doi.org/10.1109/ISCAS.2015.7169164}, interhash = {18f833cf297fa21e702eab4dfbb41b0a}, intrahash = {7c6175956e3c90a21367f6029e36a244}, isbn = {978-1-4799-8391-9}, keywords = {dblp}, pages = {2385-2388}, publisher = {IEEE}, timestamp = {2015-08-06T11:33:45.000+0200}, title = {A high-voltage DC bias architecture implementation in a 17 Gbps low-power common-cathode VCSEL driver in 80 nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2015.html#SzilagyiBHE15}, year = 2015 }