%0 Conference Paper %1 conf/dcis/HariharanGNR18 %A Hariharan, Ranganathan %A Ghasempouri, Tara %A Niazmand, Behrad %A Raik, Jaan %B DCIS %D 2018 %I IEEE %K dblp %P 1-6 %T From RTL Liveness Assertions to Cost-Effective Hardware Checkers. %U http://dblp.uni-trier.de/db/conf/dcis/dcis2018.html#HariharanGNR18 %@ 978-1-7281-0171-2

@inproceedings{conf/dcis/HariharanGNR18, added-at = {2019-04-09T00:00:00.000+0200}, author = {Hariharan, Ranganathan and Ghasempouri, Tara and Niazmand, Behrad and Raik, Jaan}, biburl = {https://www.bibsonomy.org/bibtex/2b4e10ea0ffeda74a93c9e4df862873cf/dblp}, booktitle = {DCIS}, crossref = {conf/dcis/2018}, ee = {https://doi.org/10.1109/DCIS.2018.8681487}, interhash = {1c0eb136f7629fe481983eed11ef12fa}, intrahash = {b4e10ea0ffeda74a93c9e4df862873cf}, isbn = {978-1-7281-0171-2}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2019-04-10T11:38:04.000+0200}, title = {From RTL Liveness Assertions to Cost-Effective Hardware Checkers.}, url = {http://dblp.uni-trier.de/db/conf/dcis/dcis2018.html#HariharanGNR18}, year = 2018 }