%0 Conference Paper %1 conf/vlsid/ChaturvediA11 %A Chaturvedi, Vikram %A Amrutur, Bharadwaj %B VLSI Design %D 2011 %I IEEE Computer Society %K dblp %P 328-333 %T A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS Technology. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2011.html#ChaturvediA11 %@ 978-0-7695-4348-2

@inproceedings{conf/vlsid/ChaturvediA11, added-at = {2023-03-24T00:00:00.000+0100}, author = {Chaturvedi, Vikram and Amrutur, Bharadwaj}, biburl = {https://www.bibsonomy.org/bibtex/261605b5e676fc02a9ef7be00b7a0cc22/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2011}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2011.41}, interhash = {1c9e7b8fd30200cd81822d0153183b94}, intrahash = {61605b5e676fc02a9ef7be00b7a0cc22}, isbn = {978-0-7695-4348-2}, keywords = {dblp}, pages = {328-333}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:08:33.000+0200}, title = {A Low-Noise Low-Power Noise-Adaptive Neural Amplifier in 0.13um CMOS Technology.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2011.html#ChaturvediA11}, year = 2011 }