%0 Conference Paper %1 conf/vlsit/TanejaSKDM23 %A Taneja, Sachin %A Suresh, Vikram B. %A Kumar, Raghavan %A De, Vivek %A Mathew, Sanu %B VLSI Technology and Circuits %D 2023 %I IEEE %K dblp %P 1-2 %T 218Kauth/s, 3nJ/auth SCA/ML-Resistant Privacy-Preserving Mutual Authentication Accelerator with a Crypto-Double-Coupled PUF in 4nm class CMOS. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#TanejaSKDM23 %@ 978-4-86348-806-9

@inproceedings{conf/vlsit/TanejaSKDM23, added-at = {2023-07-28T00:00:00.000+0200}, author = {Taneja, Sachin and Suresh, Vikram B. and Kumar, Raghavan and De, Vivek and Mathew, Sanu}, biburl = {https://www.bibsonomy.org/bibtex/2fc8eff3e65eeb59cc59ce189fe053890/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2023}, ee = {https://doi.org/10.23919/VLSITechnologyandCir57934.2023.10185214}, interhash = {1eb7c2a8b9fe090405de42ec6acaea9b}, intrahash = {fc8eff3e65eeb59cc59ce189fe053890}, isbn = {978-4-86348-806-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:01.000+0200}, title = {218Kauth/s, 3nJ/auth SCA/ML-Resistant Privacy-Preserving Mutual Authentication Accelerator with a Crypto-Double-Coupled PUF in 4nm class CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2023.html#TanejaSKDM23}, year = 2023 }