Inproceedings,

Adagio: making DVS practical for complex HPC applications

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Proceedings of the 23rd international conference on Supercomputing, page 460--469. New York, NY, USA, ACM, (2009)
DOI: 10.1145/1542275.1542340

Abstract

Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time for energy savings, which is unacceptable for most high performance computing applications. We present <i>Adagio</i>, a novel runtime system that makes DVS practical for complex, real-world scientific applications by incurring only negligible delay while achieving significant energy savings. <i>Adagio</i> improves and extends previous state-of-the-art algorithms by combining the lessons learned from static energy-reducing CPU scheduling with a novel runtime mechanism for slack prediction. We present results using <i>Adagio</i> for two real-world programs, <i>UMT2K</i> and <i>ParaDiS</i>, along with the NAS Parallel Benchmark suite. While requiring no modification to the application source code, <i>Adagio</i> provides total system energy savings of 8% and 20% for <i>UMT2K</i> and <i>ParaDiS</i>, respectively, with less than 1% increase in execution time.

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