%0 Conference Paper %1 conf/esorics/GeGTXLY18 %A Ge, Jingquan %A Gao, Neng %A Tu, Chenyang %A Xiang, Ji %A Liu, Zeyi %A Yuan, Jun %B ESORICS (1) %D 2018 %E López, Javier %E Zhou, Jianying %E Soriano, Miguel %I Springer %K dblp %P 197-217 %T Combination of Hardware and Software: An Efficient AES Implementation Resistant to Side-Channel Attacks on All Programmable SoC. %U http://dblp.uni-trier.de/db/conf/esorics/esorics2018-1.html#GeGTXLY18 %V 11098 %@ 978-3-319-99073-6

@inproceedings{conf/esorics/GeGTXLY18, added-at = {2018-08-13T00:00:00.000+0200}, author = {Ge, Jingquan and Gao, Neng and Tu, Chenyang and Xiang, Ji and Liu, Zeyi and Yuan, Jun}, biburl = {https://www.bibsonomy.org/bibtex/2ba8abc1d601b57390b910e5147f6e417/dblp}, booktitle = {ESORICS (1)}, crossref = {conf/esorics/2018-1}, editor = {López, Javier and Zhou, Jianying and Soriano, Miguel}, ee = {https://doi.org/10.1007/978-3-319-99073-6_10}, interhash = {233a1fb0ece3c65e9161a4edc71af8ca}, intrahash = {ba8abc1d601b57390b910e5147f6e417}, isbn = {978-3-319-99073-6}, keywords = {dblp}, pages = {197-217}, publisher = {Springer}, series = {Lecture Notes in Computer Science}, timestamp = {2019-05-15T14:07:26.000+0200}, title = {Combination of Hardware and Software: An Efficient AES Implementation Resistant to Side-Channel Attacks on All Programmable SoC.}, url = {http://dblp.uni-trier.de/db/conf/esorics/esorics2018-1.html#GeGTXLY18}, volume = 11098, year = 2018 }